发明名称 Processor instructions for improved AES encryption and decryption
摘要 Encrypting information involving the execution of a first instruction and a second instruction on a processor. The first instruction causes the processor to perform an AddRoundKey transformation followed by a ShiftRows transformation. The second instruction causes the processor to perform a ShiftRows transformation followed by a MixColumns transformation. These instructions are useful for performing AES encryption. The first and second instructions also have inverse modes that may be used to perform AES decryption.
申请公布号 US8280040(B2) 申请公布日期 2012.10.02
申请号 US20090365543 申请日期 2009.02.04
申请人 FRANK MICHAEL;GLOBALFOUNDRIES INC. 发明人 FRANK MICHAEL
分类号 G06F21/00 主分类号 G06F21/00
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