发明名称 Semiconductor device having hierarchical data line structure and control method thereof
摘要 To provide a semiconductor device including switch transistor provided between a sub-data line and a main data line. Upon transferring data, the semiconductor device supplies a potential of a VPP level to a gate electrode of the switch transistor when causing the switch transistor to be a conductive state, and supplies a potential of a VPERI level to the gate electrode when causing the switch transistor to be a non-conductive state. According to the present invention, because a potential of the gate electrode is not decreased to a VSS level when causing the switch transistor to be a non-conductive state, it is possible to reduce a current required to charge and discharge a gate capacitance of the switch transistor. Furthermore, because the VPP level is supplied to the gate electrode when causing the switch transistor to be a conduction state, a level of a signal after transfer never drops down by the amount of the threshold voltage.
申请公布号 US8279692(B2) 申请公布日期 2012.10.02
申请号 US20100910496 申请日期 2010.10.22
申请人 MATSUI YOSHINORI;ELPIDA MEMORY, INC. 发明人 MATSUI YOSHINORI
分类号 G11C7/00 主分类号 G11C7/00
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