SEMICONDUCTOR INTEGRATED CIRCUIT, FAILURE DIAGNOSIS SYSTEM AND FAILURE DIAGNOSIS METHOD

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of determining a failure type of embedded memory.

SOLUTION: A semiconductor integrated circuit comprises: a memory that includes multiple memory bits for storing predetermined data arranged in first and second address directions; and a BIST circuit for diagnosing a failure in the memory. The BIST circuit includes: a BIST control circuit that controls a BIST applied to the memory; a failure information table that stores a first defective bit cell position equivalent to an address in the first address direction of a bit cell determined to have a failure by the BIST in the first address direction, stores the number of failures in the bit cell at the first defective bit cell position, and stores a fail-over flow flag which shows whether or not the number of failures exceeds a predetermined upper limit; and a result analyzer that outputs a BIST result obtained by the BIST applied to the memory.

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