发明名称 Control Method for Memory Cell
摘要 A control method for at least one memory cell. The memory cell includes a transistor and a resistor. The resistor is connected to the transistor in series between a first node and a second node. In a programming mode, the memory cell is programmed. When it is determined that the memory cell has been successfully programmed, impedance of the memory cell is in a first state. When it is determined that the memory cell has not been successfully programmed, a specific action is executed to reset the memory cell. The impedance of the memory cell is in a second state after the step resetting the memory cell. The impedance of the memory cell in the second state is higher than that of the memory cell in the first state.
申请公布号 US2012243346(A1) 申请公布日期 2012.09.27
申请号 US201213488937 申请日期 2012.06.05
申请人 CHEN YU-SHENG;LEE HENG-YUAN;HSU YEN-YA;CHEN PANG-SHIU;HSU CHING-CHIH;CHEN FREDERICK T.;INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE 发明人 CHEN YU-SHENG;LEE HENG-YUAN;HSU YEN-YA;CHEN PANG-SHIU;HSU CHING-CHIH;CHEN FREDERICK T.
分类号 G11C7/00 主分类号 G11C7/00
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