发明名称 LAYERED SEMICONDUCTOR DEVICE MANUFACTURING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To provide a manufacturing method which enables a layered semiconductor device to be manufactured at low cost by reducing man-hour and cost in laminating a plurality of semiconductor chips. <P>SOLUTION: In an embodiment, a method comprises: preparing a first semiconductor wafer 1 having a singulated plurality of first chip regions and a first photosensitive surface protection film and adhesive layer 2 provided on a circuit surface of each of the first chip regions; laminating a circuit surface 9a of a second semiconductor wafer 9 having a singulated plurality of second chip regions and a second photosensitive surface protection film and adhesive layer 8 provided on the circuit surface of each of the second chip regions, with a non-circuit surface 1b of the first semiconductor wafer 1 via the second photosensitive surface protection film and adhesive layer 8; and forming chip laminates of the first chip regions and the second chip regions collectively. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012186295(A) 申请公布日期 2012.09.27
申请号 JP20110047978 申请日期 2011.03.04
申请人 TOSHIBA CORP 发明人 OMIZO NAOKO;YOSHIMURA ATSUSHI;IWAMI FUMIHIRO
分类号 H01L25/065;H01L25/07;H01L25/18 主分类号 H01L25/065
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