发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 Provided is a manufacturing method of semiconductor integrated circuit, which is effective when applied to a processing technique for a gate electrode or the like. In the patterning of a gate stack film having a high-k gate insulating film and a metal electrode film in a memory region, etching for a cut region between adjacent gate electrodes is performed first using a first resist film and, after the first resist film that is no longer needed is removed, etching for a line and space pattern is performed using a second resist film.
申请公布号 US2012244694(A1) 申请公布日期 2012.09.27
申请号 US201213396429 申请日期 2012.02.14
申请人 SHINOHARA MASAAKI;RENESAS ELECTRONICS CORPORATION 发明人 SHINOHARA MASAAKI
分类号 H01L21/336 主分类号 H01L21/336
代理机构 代理人
主权项
地址
您可能感兴趣的专利