发明名称 POWER CONSUMPTION VERIFICATION SUPPORT APPARATUS AND POWER CONSUMPTION VERIFICATION SUPPORT METHOD
摘要 A power consumption verification support apparatus of an embodiment has a power consumption approximate calculation module, a comparison/determination module, a delay control module, and a dump processing module. The power consumption approximate calculation module approximately calculates power consumption at each predetermined time of a first simulation that observes a designation signal. The comparison/determination module compares an approximately calculated value of the power consumption with a threshold value, and determines whether or not to perform dump processing for each predetermined time from a comparison result. The delay control module causes a second simulation that observes all signals to be executed by delaying the second simulation by the predetermined time with respect to the first simulation. The dump processing module stores waveform data of all the signals for the predetermined time for which the dump processing is determined to be performed.
申请公布号 US2012245907(A1) 申请公布日期 2012.09.27
申请号 US201113236463 申请日期 2011.09.19
申请人 YAGYUU AKIHISA;KABUSHIKI KAISHA TOSHIBA 发明人 YAGYUU AKIHISA
分类号 G06F17/50 主分类号 G06F17/50
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