| 摘要 |
<p>An error correct coding device comprises: a coding device of quasi-cyclic low-density parity inspection coding which computes r*m bits of redundant data for information data of k*m bit length (where k, m, and r are positive integers); and a cyclic adding device further comprising a k*m-bit shift register and an XOR. For information data of k*m*L bit length (where L is a positive integer less than or equal to k), redundant data of r*m*L bit length which is computed by applying the coding device L times, data of k*m bits which is computed by inputting the information data of k*m*L bit length into the cyclic adding device, and r*m bits of redundant data which is computed by inputting the k*m bits of data into the coding device are added, and (r*m*(L+1)+k*m) bits computed as redundant data.</p> |
