| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a method for predecoding of variable-length instruction by a processor. <P>SOLUTION: A predecoder of a variable-instruction-length processor displays an attribute of an instruction with predecode bits stored in an instruction cache together with the instruction. When the whole encoding of predecode bits PD0, PD1 related to an instruction having a length of one is defined, the attribute of the instruction having the length is displayed by changing an instruction for emulating an instruction having a different length and encoding the attribute of predecode bits related to the instruction having the different length. One example of the attribute which is thus displayed is an undefined instruction. <P>COPYRIGHT: (C)2012,JPO&INPIT |
