| 摘要 |
<P>PROBLEM TO BE SOLVED: To decrease the number of masks of a 3D laminate memory device, in which the required number of masks increases because a separate mask is used for each connection level, by devising the pattern. <P>SOLUTION: A three-dimensional lamination integrated circuit device has a lamination part of connection level in a wiring region. Only N sets of etching mask for forming a wiring connection region containing up to 2<SP POS="POST">N</SP>levels in the lamination part of connection level are required. In some examples, connection levels of 2<SP POS="POST">X-1</SP>are etched by an etching mask of sequential number X, where X=1 in one mask, X=2 in another mask, and the X is given up to X=N. A wiring connection region matching a formation region at the connection level is formed by this method. <P>COPYRIGHT: (C)2012,JPO&INPIT |
