| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide interconnection resources for increasing operation speed of a programmable logic array integrated circuit device, by application on a programmable logic device. <P>SOLUTION: A programmable logic integrated circuit (10) has a plurality of regions (20) of programmable logic disposed on the device in an array consisting of a plurality of intersecting rows and columns of regions. Interconnection resources (e.g., interconnection conductors, etc.) are provided for making programmable interconnections to, from, and/or between the regions. At least some of these interconnection resources are provided in two forms that are architecturally similar but that have significantly different signal propagation speed characteristics. For example, a major or larger portion (200a, 210a, 230a) of such dual-form interconnection resources has speed termed normal speed, while a smaller minor portion (200b, 210b, 230b) has significantly faster signal speed. <P>COPYRIGHT: (C)2012,JPO&INPIT |
