| 摘要 |
<p>A CPU (20) is connected to a memory (12). Moreover, the CPU (20) has an L2 data storage unit (42) that has a plurality of cache lines and stores data in each of the plurality of cache lines. Furthermore, the CPU (20) has an L2 tag storage unit (41) that has a plurality of tags and stores the status information of the data stored in each of the plurality of cache lines in each of the tags corresponding to a cache line. This type of CPU (20) monitors the memory busy rate of the memory (12). Moreover, the CPU (20) monitors the cache busy rate of the L2 data storage unit (42). Also, the CPU (20) performs swap processing to cause a cache control unit (30) to store the data stored in each cache line into the memory (12), on the basis of the memory busy rate, the cache busy rate and the status information stored in each of the tags.</p> |
