| 摘要 |
<p>In one embodiment, a method includes, upon occurrence of multiple power state transition events for a core of a multi-core processor, reading a value of a system counter of the core and values of low power counters of the core, without expiration of a timer or triggering of an interrupt. These values can be stored in a storage of the processor. Then, after collection is completed, the storage can be accessed to determine a power profile of the processor using the stored values. Other embodiments are described and claimed.</p> |
