发明名称
摘要 <P>PROBLEM TO BE SOLVED: To contrive the reduction of voltage of a receiving circuit coping with communication interface utilizing amplitude modulation system. <P>SOLUTION: The semiconductor integrated circuit device (B2) comprises a first operation amplifying circuit (A1), a capacitance (C1) capable of transmitting an inputted signal to an inversion input terminal of the first operation amplifying circuit and a feedback route (B11) provided between an output terminal and the inversion input terminal of the first operation amplifying circuit while a reference voltage is supplied to a non-inversion input terminal of the first operation amplifying circuit. The feedback route is provided with an n-channel type first MOS transistor (M2) connected to the output terminal and inversion input terminal of the first operation amplifying circuit, a p-channel type second MOS transistor (M1) connected to the output terminal and the inversion input terminal of the first operation amplifying circuit and a first gate voltage control circuit (B13) for setting the gate voltage of the second MOS transistor to a level lower than the reference voltage to achieve the reduction of the voltage of the receiving circuit. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP5036039(B2) 申请公布日期 2012.09.26
申请号 JP20070090921 申请日期 2007.03.30
申请人 发明人
分类号 H01L21/822;G06K19/07;G06K19/077;H01L27/04;H04B1/59;H04B5/02 主分类号 H01L21/822
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