发明名称 LSI, fail-safe LSI for railways, electronic device, and electronic device for railways
摘要 Conventional fail-safe LSIs have been used for the placement of processors and comparators in chips, but have not been used for the placement of package signal pins. The adaptability of fail-safe LSIs to various peripheral circuits and high speed memory has also not been considered. An integrated internal interface, in which the output from two processors is matched, is connected to a common line internal bus, and a plurality of external interface circuits are connected to the common line internal bus. Furthermore, signal pins corresponding to two systems are disposed at opposite corners of a package, and signal pins corresponding to a common line are disposed therebetween.
申请公布号 GB2489353(A) 申请公布日期 2012.09.26
申请号 GB20120011339 申请日期 2010.12.21
申请人 HITACHI LTD 发明人 TETSUAKI NAKAMIKAWA;KOTARO SHIMAMURA;HIDEO SAKUYAMA;TAKESHI TAKEHARA
分类号 H03K19/007;B61L27/00;G06F11/16;H01L27/04 主分类号 H03K19/007
代理机构 代理人
主权项
地址