发明名称 Reference voltage generation circuit and semiconductor memory
摘要 A reference voltage generation circuit includes a first node settable at a reference voltage to be any one of a plurality of voltage levels, a second node set at a pre-charge voltage, first and second switches connected in series between the first and second nodes, a plurality of capacitors, each capacitor comprising a first end connected to a connection node between the first and second switches and a second end settable at an independent voltage level, a switch controller configured to turn off the first switch and turn on the second switch in an initial state, and then to turn off the second switch, and then to turn on the first switch, and a voltage controller configured to individually set a voltage at the second end of each capacitor after the first switch is turned on.
申请公布号 US8274846(B2) 申请公布日期 2012.09.25
申请号 US20100652612 申请日期 2010.01.05
申请人 SHIGA HIDEHIRO;TAKASHIMA DAISABURO;KABUSHIKI KAISHA TOSHIBA 发明人 SHIGA HIDEHIRO;TAKASHIMA DAISABURO
分类号 G11C5/14 主分类号 G11C5/14
代理机构 代理人
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