发明名称 |
Method of fabricating an NMOS transistor |
摘要 |
A SiC region and a source/drain region are formed such that the SiC region includes a first portion overlapping the source/drain region and a second portion protruding from the source/drain region to a position beneath the LDD region. The concentration of crystalline SiC in the second portion is higher than the concentration of crystalline SiC in the first portion. The SiC region may be formed through a normal implantation before the second spacer is formed, or the SiC region may be formed through a tilt implantation or deposition epitaxially in a recess having a sigma-shape like sidewall after the second spacer is formed. |
申请公布号 |
US8273642(B2) |
申请公布日期 |
2012.09.25 |
申请号 |
US20100897771 |
申请日期 |
2010.10.04 |
申请人 |
TSAI CHEN-HUA;LIAO PO-JUI;KUO TZU-FENG;LI CHING-I;TSAI CHENG-TZUNG;UNITED MICROELECTRONICS CORP. |
发明人 |
TSAI CHEN-HUA;LIAO PO-JUI;KUO TZU-FENG;LI CHING-I;TSAI CHENG-TZUNG |
分类号 |
H01L21/425 |
主分类号 |
H01L21/425 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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