发明名称 Method for fabricating a semiconductor memory device having a buried word line structure
摘要 A method for fabricating a semiconductor apparatus including a buried gate removes factors deteriorating the operational reliability of the semiconductor device such as the electrical connection between a contact and a word line, and increases a processing margin when forming the contact disposed on a source/drain region. The method includes forming a recess in a semiconductor substrate, forming a gate in a lower portion of the recess, forming a first insulation layer over the gate, growing silicon over the first insulation layer in the recess, and depositing a second insulation layer over the semiconductor substrate and in the remaining portion of the recess.
申请公布号 US8274111(B2) 申请公布日期 2012.09.25
申请号 US20090650253 申请日期 2009.12.30
申请人 KIM HAN NAE;HYNIX SEMICONDUCTOR INC. 发明人 KIM HAN NAE
分类号 H01L29/66;H01L21/336 主分类号 H01L29/66
代理机构 代理人
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