摘要 |
The present disclosure includes devices, systems, and methods for memory address translation. One or more embodiments include a memory array and a controller coupled to the array. The array includes a first table having a number of records, wherein each record includes a number of entries, wherein each entry includes a physical address corresponding to a data segment stored in the array and a logical address. The controller includes a second table having a number of records, wherein each record includes a number of entries, wherein each entry includes a physical address corresponding to a record in the first table and a logical address. The controller also includes a third table having a number of records, wherein each record includes a number of entries, wherein each entry includes a physical address corresponding to a record in the second table and a logical address. |
申请人 |
MICRON TECHNOLOGY, INC.;MANNING, TROY, A.;CULLEY, MARTIN, L.;LARSEN, TROY, D. |
发明人 |
MANNING, TROY, A.;CULLEY, MARTIN, L.;LARSEN, TROY, D. |