| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a system having great extendability. <P>SOLUTION: A master (processor 52a) stores identification information S1 of a slave (SDRAM controller 34) that is a transmission destination and identification information M3 of the master and transmits a request. A router 57 transfers the request to a port P56 on the basis of the identification information S1. A router 37 which receives the request through chip links 58 and 39 transfers the request to a port P33 on the basis of the identification information S1. The slave stores the identification information M3 and transmits a response. The router 37 transfers the response to the port P35 on the basis of the identification information M3. The router 57 which receives the response through the chip links 39 and 58 transfers the response to a port P51 on the basis of the identification information M3. It allows the master, slave, and each router to perform communication between chips 31 and 47 with processing similar to the communication in a chip. <P>COPYRIGHT: (C)2012,JPO&INPIT |
