发明名称 MULTICAST ADDRESS LEARNING IN AN INPUT/OUTPUT ADAPTER OF A NETWORK PROCESSOR
摘要 An apparatus for supporting multicast address learning in a network processor includes a task parameter decoder receiving the packet and determining parameters of the packet, a plurality of unlearned address counters recording a number of the packets to be multicast, a correlator determining destination addresses of the packet, a multicast replicator replicating the packet multiple times, and a task generator generating a generated packet with a bitmap and sending out the generated packet to an I/O adaptor over a task ring interface of the network processor. If the packet is unlearned, the unlearned address counter is then incremented and the unlearned packet is sent back to a special queue in the I/O adaptor over the task ring interface with an index to the bitmap for replicating by the multicast replicator, after replicating, the unlearned address counter is decremented. Methods for replicating unlearned/learned multicast packets within a network processor are included.
申请公布号 US2012236857(A1) 申请公布日期 2012.09.20
申请号 US201213480623 申请日期 2012.05.25
申请人 MANZELLA JOSEPH A.;VORA NILESH S.;PEACHEY RITCHIE J.;LSI CORPORATION 发明人 MANZELLA JOSEPH A.;VORA NILESH S.;PEACHEY RITCHIE J.
分类号 H04L12/56 主分类号 H04L12/56
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