发明名称 Circuit and Method for a Three Dimensional Non-Volatile Memory
摘要 An architecture, circuit and method for providing a very dense, producible, non volatile FLASH memory with SONOS cells. SONOS memory cells are formed using a uniformly doped channel region. A FinFET embodiment cell is disclosed. Because the novel SONOS cells do not rely on diffused regions, the cells may be formed into a three dimensional array of cells without diffusion problems. FLASH memory arrays are formed by forming layers of NAND Flash cells in the local interconnect layers of an integrated circuit, with the metal layers forming the global bit line conductors. The three dimensional non-volatile arrays formed of the SONOS cells rely on conventional semiconductor processing. P-channel and n-channel devices may be used to form the SONOS non-volatile cells.
申请公布号 US2012235224(A1) 申请公布日期 2012.09.20
申请号 US201213428754 申请日期 2012.03.23
申请人 YEH CHIH CHIEH;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 YEH CHIH CHIEH
分类号 H01L29/792 主分类号 H01L29/792
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