发明名称
摘要 A voltage controlled oscillator (VCO) generates a clock signal at an output terminal in response to control signals generated based on UP and DOWN pumping signals, and varies the capacitance of the output terminal concurrently with changing frequency of the clock signal. An independent claim is also included for phase locked loop device.
申请公布号 JP5031233(B2) 申请公布日期 2012.09.19
申请号 JP20050367035 申请日期 2005.12.20
申请人 发明人
分类号 H03L7/099 主分类号 H03L7/099
代理机构 代理人
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