发明名称 MECHANISMS TO ACCELERATE TRANSACTIONS USING BUFFERED STORES
摘要 <p>In one embodiment, the present invention includes a method for executing a transactional memory (TM) transaction in a first thread, buffering a block of data in a first buffer of a cache memory of a processor, and acquiring a write monitor on the block to obtain ownership of the block at an encounter time in which data at a location of the block in the first buffer is updated. Other embodiments are described and claimed.</p>
申请公布号 KR20120103715(A) 申请公布日期 2012.09.19
申请号 KR20127018482 申请日期 2010.11.10
申请人 INTEL CORP. 发明人 ADL TABATABAI ALI REZA;NI YANG;SAHA BRATIN;CALLAHAN DAVID;BASSIN VADIM;SHEAFFER GAD
分类号 G06F9/06;G06F3/06;G06F9/30;G06F12/08 主分类号 G06F9/06
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