High speed, low power consumption, isolated analog CMOS unit

摘要

A semiconductor device including: a low threshold PMOS device formed over an N-type region, the source and drain of the low threshold PMOS formed in P-regions surrounded by N-regions; a low threshold NMOS device formed in a P-type region, the source and drain of the low threshold NMOS formed in N-regions surrounded by P-regions; first and second substrate bias generators, each connected to one of the low threshold devices for generating a substrate bias; a voltage source for generating substrate bias during a standby mode to reduce leakage current; wherein a low voltage threshold is established by the source and drain regions of the low threshold devices and their respective surrounding regions of opposite polarity.