发明名称 Phase delay signal generator, Chip test device of comprising the same and Method of manufacturing phase delay signal
摘要 PURPOSE: A phase delay signal generator, equipment for a chip test including the same, and a method for creating a phase delay signal are provided to prevent the generation of mismatch and to eliminate PVT variation in a linear delay cell. CONSTITUTION: A phase delay signal generator comprises a digital control vibrator(100), a controller(200), a plurality of single phase generators(300), and a multiplexor(400). The digital control vibrator creates a reference signal. The controller controls the digital control vibrator. The plurality of single phase generators locks an input signal inputted from a fixed number delay generator to a reference signal created by the digital control vibrator and creates a plurality of single phase delay signals. The multiplexor selects a special signal among the plurality of single phase delay signals and transfers the special signal to a linear phase delay cell.
申请公布号 KR101183166(B1) 申请公布日期 2012.09.17
申请号 KR20110011049 申请日期 2011.02.08
申请人 发明人
分类号 H03L7/081;G01R31/26;G01R31/3183;H01L21/66 主分类号 H03L7/081
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