发明名称 SEMICONDUCTOR INTERCONNECT STRUCTURE WITH MULTI-LAYERED SEED LAYER PROVIDING ENHANCED RELIABILITY AND MINIMIZING ELECTROMIGRATION
摘要 An interconnect structure and method for forming a multi-layered seed layer for semiconductor interconnections are disclosed. Specifically, the method and structure involves utilizing sequential catalytic chemical vapor deposition, which is followed by annealing, to form the multi-layered seed layer of an interconnect structure. The multi-layered seed layer will improve electromigration resistance, decrease void formation, and enhance reliability of ultra-large-scale integration (ULSI) chips.
申请公布号 US2012228771(A1) 申请公布日期 2012.09.13
申请号 US201113044660 申请日期 2011.03.10
申请人 EDELSTEIN DANIEL C.;NOGAMI TAKESHI;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 EDELSTEIN DANIEL C.;NOGAMI TAKESHI
分类号 H01L23/48;C23C16/44;C23C16/455;C23C16/458;C23C16/46;C23C16/52;H01L21/768 主分类号 H01L23/48
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