发明名称 Concatenated codes combining Reed-Solomon codes, LDPC codes and parity codes for encoding/decoding devices
摘要 <p>An error correction device error corrects without increasing the circuit scale. An encoder includes: a first ECC encoder (235) which interleaves a data string into n (n ≥ 2) blocks of data strings at every m (m ≥ 2) bits, and adds the error correction code parity; a parity encoder (234) which creates a parity bit at every plurality of bits of the error correction code word, and adds the parity bit to said error correction code word; and a second ECC encoder (220), which generates a second error correction encoding, which is a linear encoding using iterative decoding. Concatenated type encoded data, where a parity bit is added to every plurality of bits, is created, so an increase of circuit scale can be prevented even if a data string is interleaved into a plurality of blocks and error correction code parity is generated. The device may be applied, for example, to a long sector type hard disk. </p>
申请公布号 EP2086114(A3) 申请公布日期 2012.09.12
申请号 EP20080170099 申请日期 2008.11.27
申请人 FUJITSU LIMITED 发明人 KANAOKA, TOSHIKAZU;ITO, TOSHIO
分类号 H03M13/29;G11B20/00;H03M13/09;H03M13/11;H03M13/15;H03M13/27 主分类号 H03M13/29
代理机构 代理人
主权项
地址