发明名称 |
Verification apparatus, verification method, and computer-readable recording medium for supporting engineering change order |
摘要 |
A verification apparatus includes a reference circuit-side point extraction unit that extracts a point where the input value of a signal changes due to a logic change in a reference circuit in a state before and after the logic change, based on information regarding a signal that has changed due to the logic change in the reference circuit; a circuit to be verified-side point extraction unit that extracts a point where the input value of a signal changes due to a logic change in a circuit to be verified in a state before and after the logic change, based on information regarding a signal that has changed due to the logic change in the circuit to be verified; and a verification script generation unit that generates a verification script with use of the points extracted by the reference circuit-side point extraction unit and the circuit to be verified-side point extraction unit. |
申请公布号 |
US8266564(B2) |
申请公布日期 |
2012.09.11 |
申请号 |
US20100796725 |
申请日期 |
2010.06.09 |
申请人 |
GOTO ATSUKO;NEC CORPORATION |
发明人 |
GOTO ATSUKO |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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