发明名称 Protection against attacks by generation of errors on jump instructions
摘要 A method for securing a program against attacks by error, i.e. in a chip card, wherein at least one jump instruction, including a relative address chosen from a plurality of possible relative addresses, is identified in the program, wherein the at least one jump instruction makes it possible to reach a targeted address inside the memory area extending before and after the jump instruction and regrouping the plurality of possible relative addresses, inside the memory area, wherein an instruction to be preserved is identified and, in order to secure at least the instruction, at least one first non-operative batch including at least one instruction is inserted, the insertion being carried out in such a way as to ensure that the insertion is compatible with maintenance of the address targeted by the jump instruction inside the memory area and that the insertion is compatible with the normal running of the program.
申请公布号 US8266423(B2) 申请公布日期 2012.09.11
申请号 US20050665991 申请日期 2005.10.18
申请人 GIRAUD CHRISTOPHE;THIEBEAULD DE LA CROUEE HUGUES;OBERTHUR TECHNOLOGIES 发明人 GIRAUD CHRISTOPHE;THIEBEAULD DE LA CROUEE HUGUES
分类号 G06F21/00;G06F21/52;G06F21/55 主分类号 G06F21/00
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