发明名称 |
Secure flash memory using error correcting code circuitry |
摘要 |
A processor and memory system includes memory, a table of exceptions, and a processor. The memory includes a plurality of memory blocks. The table of exceptions identifies at least one of the plurality of memory blocks that includes an expected error. The processor diagnoses a security fault based on data stored in at least one of the plurality of memory blocks and the table of exceptions. |
申请公布号 |
US8266454(B2) |
申请公布日期 |
2012.09.11 |
申请号 |
US20090424234 |
申请日期 |
2009.04.15 |
申请人 |
KURNIK JAMES T.;GAYNIER RONALD J.;GM GLOBAL TECHNOLOGY OPERATIONS LLC |
发明人 |
KURNIK JAMES T.;GAYNIER RONALD J. |
分类号 |
G06F11/30 |
主分类号 |
G06F11/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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