发明名称 Method of sampling phase calibration and device thereof
摘要 A method of sampling phase calibration and a device thereof is suitable for an analog-to-digital converter and phase lock loop (ADC-PLL). The ADC-PLL conducts sampling on a periodic analog signal according to a sampling phase so as to produce a plurality of digital signals. The sampling phase calibration device includes a storage unit, a motion-detecting unit and a control unit. The motion-detecting unit is to calculate the number of motion data corresponding to a sampling phase. The control unit is coupled to the motion-detecting unit for changing the sampling phase so as to obtain the number of motion data corresponding to each sampling phase and selecting the sampling phase corresponding to the minimum number of motion data as an optimal sampling phase. The ADC-PLL can correctly sample an analog signal by using the optimal sampling phase and reduce the influence of clock jitter to the minimum.
申请公布号 US8264607(B2) 申请公布日期 2012.09.11
申请号 US20100883182 申请日期 2010.09.16
申请人 CHEN CHIAN-WEN;LU WEI-LUNG;LEE JUI-YAO;SUNPLUS TECHNOLOGY CO., LTD. 发明人 CHEN CHIAN-WEN;LU WEI-LUNG;LEE JUI-YAO
分类号 H03L7/00 主分类号 H03L7/00
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