| 摘要 |
An image processing apparatus includes n line buffer circuits and a delay adjustment section. In a case of a filter process, (i) image data corresponding to n lines stored in the n line buffer circuits and (ii) image data corresponding to one line supplied to the delay adjustment section are outputted to a spatial filter process section in synchronization with each other. In a case of a dilation process, (i) image data corresponding to m lines stored in m line buffer circuits of the n line buffer circuits and (ii) image data corresponding to one line supplied to the delay adjustment section are outputted to a dilation process section in synchronization with each other. This reduces the size of a circuit of an image processing device including a plurality of types of image process sections for carrying out image processes by using image data with different numbers of lines. |
