| 摘要 |
<P>PROBLEM TO BE SOLVED: To improve speed performance of a whole system by reducing time required for writing data to a memory. <P>SOLUTION: A memory writing controller 3 specifies, from read data, a bit position for which error correction is required, based on an error correction check bit, merges writing requirement data based on a writing position specification signal output from a CPU1, and generates writing data before correction. Further, the controller 3 generates an error correction check bit from the writing data, to output the writing data with the check bit, generates, when a bit position where the error correction is required is specified, correction data indicative of whether or not the error correction of the specified bit position is required, generates corrected writing data with the error correction check bit from the uncorrected writing data with the error correction check bit, and writes the data into a memory 2. <P>COPYRIGHT: (C)2012,JPO&INPIT |
