发明名称 ERRONEOUS WIRING PREVENTION CIRCUIT AND SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To prevent erroneous wiring to a protection object module while suppressing increase of writing time. <P>SOLUTION: An erroneous writing prevention circuit has: a comparison code generation part which acquires a part of values of at least one of an address and data output to a bus and generates a comparison code by using the acquired value; a comparison part which compares an expectation value corresponding to the data to be written in a protection object module connected to the bus with the comparison code; and a writing control part which determines whether or not to permit writing to the module based on a comparison result of the comparison part. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012174123(A) 申请公布日期 2012.09.10
申请号 JP20110037302 申请日期 2011.02.23
申请人 FUJITSU SEMICONDUCTOR LTD 发明人
分类号 G06F21/24;G06F12/14 主分类号 G06F21/24
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