发明名称 STORAGE APPARATUS AND DATA PROCESSING METHOD OF THE SAME
摘要 <p>Comprises a memory control unit which transmits and receives data to and from respective interface control units in accordance with access requests and also controls access to the memory and a buffer which temporarily stores data smaller than 64B, wherein the memory control unit, during access to the memory, if the processing data to be processed is 64B, accesses the memory by using the processing data or, if the processing data is data smaller than 64B, stores the data smaller than 64B in the buffer, subsequently, if the address of the new processing data which became the processing data is sequential to the address of the data smaller than 64B stored in the buffer, combines the new processing data and the data of the buffer and, on condition that the combined processing data is 64B data, writes the combined processing data in the memory.</p>
申请公布号 WO2012117435(A1) 申请公布日期 2012.09.07
申请号 WO2011JP01150 申请日期 2011.02.28
申请人 HITACHI, LTD.;YOSHIKAWA, TAKAO;TSURUTA, SUSUMU;OKABE, TETSUHIRO;SHIBUYA, NOBUHARU 发明人 YOSHIKAWA, TAKAO;TSURUTA, SUSUMU;OKABE, TETSUHIRO;SHIBUYA, NOBUHARU
分类号 G06F3/06;G06F12/08 主分类号 G06F3/06
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