SUBSTRATE WITH EMBEDDED STACKED THROUGH-SILICON VIA DIE
摘要
A substrate with an embedded stacked through-silicon via die is described. For example, an apparatus includes a first die and a second die. The second die has one or more through-silicon vias disposed therein (TSV die). The first die is electrically coupled to the TSV die through the one or more through-silicon vias. The apparatus also includes a coreless substrate. Both the first die and the TSV die are embedded in the coreless substrate.
申请公布号
WO2012087475(A3)
申请公布日期
2012.09.07
申请号
WO2011US61628
申请日期
2011.11.21
申请人
INTEL CORPORATION;GONZALEZ, JAVIER SOTO;JOMAA, HOUSSAM