发明名称 CIRCUIT SIMULATION METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 The present disclosure provides a method of performing circuit simulation of electrical characteristics of a transistor formed on a semiconductor substrate using calculators, each of which includes a memory. A first calculator receives mask layout data and distance-dependent data indicating a distance from the target transistor. Then, a second calculator calculates an area ratio of a layout pattern of a predetermined mask from the received mask layout data, and calculates a parameterαbased on the area ratio and the distance-dependent data. Then, the second calculator B calculates a changeΔP in the electrical characteristics of the transistor based on the parameterα. This configuration provides highly accurate circuit simulation of the electrical characteristics of the transistor, which depend on variations in temperature distribution of the semiconductor substrate during heat treatment due to the mask layout pattern around the transistor.
申请公布号 US2012227016(A1) 申请公布日期 2012.09.06
申请号 US201213471061 申请日期 2012.05.14
申请人 ISHIZU TOMOYUKI;YAMASHITA KYOUJI;SUZUKI GAKU;PANASONIC CORPORATION 发明人 ISHIZU TOMOYUKI;YAMASHITA KYOUJI;SUZUKI GAKU
分类号 G06F17/50 主分类号 G06F17/50
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