| 摘要 |
The process speed and the power efficiency are improved while accomplishing downsizing by configuring an integrated hard-wired logic controller by a hard-wired logic, and a function modification is enabled by a patch circuit without re-designing of the integrated hard-wired logic controller itself by high-level synthesis even when the function modification becomes necessary because of a specification change and a false design after the production. The costs can be reduced by what corresponds to the unnecessity of re-designing. Therefore, an accelerator is provided which can improve the process speed and the power efficiency while accomplishing downsizing, and which can remarkably reduce the costs for the function modification after the production. |
