发明名称 PCI BUS CONTROL SYSTEM
摘要 <P>PROBLEM TO BE SOLVED: To avoid command errors, concerning a PCI bus control system in which an initiator and targets are connected with each other by PCI buses. <P>SOLUTION: A PCI bus control system, in which an initiator 1 and targets 2-1, 2-2 are connected with each other by PCI buses, is constituted in such a manner that: a monitoring circuit 3 and a relief circuit 4 are provided; the initiator 1 and the targets 2-1, 2-2 are connected with each other by the PCI buses via the monitoring circuit 3 and the relief circuit 4; the initiator 1, the monitoring circuit 3, and the relief circuit 4 are connected with each other by local buses which transfer commands COMM, parities PAR, and parity errors PERR; the monitoring circuit 3 executes parity check of the commands and transmits them; and the relief circuit 4 selects a normal side from the commands transferred via the PCI buses and the local buses, respectively, and transfers the commands to the targets 2-1, 2-2. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012168670(A) 申请公布日期 2012.09.06
申请号 JP20110028074 申请日期 2011.02.14
申请人 FUJITSU TELECOM NETWORKS LTD 发明人 SAKA YUKI
分类号 G06F13/00;G06F11/10;G06F13/36 主分类号 G06F13/00
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