发明名称 Decode-time computer instruction optimization
摘要 <p>Two computer machine instructions are fetched for execution, but replaced by a single optimized instruction to be executed, wherein a temporary register used by the two instructions is identified as a last-use register, where a last-use register has a value that is not to be accessed by later instructions, whereby the two computer machine instructions are replaced by a single optimized internal instruction for execution, the single optimized instruction not including the last-use register.</p>
申请公布号 GB201213322(D0) 申请公布日期 2012.09.05
申请号 GB20120013322 申请日期 2012.07.26
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人
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