| 摘要 |
<p>An acquisition circuit for a PLL is provided. The circuit comprises a controlled frequency oscillator 102 having a wide range coarse control and a narrow range fine control; a digital coarse tune circuit 110 including a sample and hold circuit 120, an up/down counter 130 and an inflection detector 140. The PLL circuit also contains an analogue phase comparator 150 and integrator 152 to provide fine tuning. The sample and hold circuit 120 provides two signals 132, 134 to the counter 130 to control counting and count direction. The inflection detector 140 detects when the up/down counter inflects. The fine tuning circuit is configured to be activated when inflection is detected.</p> |
