发明名称 Self-refresh test circuit of semiconductor memory apparatus
摘要 A self-refresh test circuit includes a test clock generation unit, a pulse generation unit, a period signal selection unit, and a self-refresh pulse control unit. The test clock generation unit divides a clock signal to generate a plurality of divided clock signals having different periods when a test enable signal is enabled, and outputs one of the plurality of divided clock signals as a selected clock signal. The pulse generation unit generates a test period signal in response to the selected clock signal. The period signal selection unit outputs one of the test period signal and a self-refresh period signal as a selected period signal. The self-refresh pulse control unit generates a self-refresh pulse in response to a self-refresh exit signal and the selected period signal.
申请公布号 US8259527(B2) 申请公布日期 2012.09.04
申请号 US20090649033 申请日期 2009.12.29
申请人 AN SUN MO;YANG JONG YEOL;HYNIX SEMICONDUCTOR INC. 发明人 AN SUN MO;YANG JONG YEOL
分类号 G11C7/00 主分类号 G11C7/00
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