发明名称 Cache control device and control method
摘要 In order to control an access request to the cache shared between a plurality of threads, a storage unit for storing a flag provided in association with each of the threads is included. If the threads enter the execution of an atomic instruction, a defined value is written to the flags stored in the storage unit. Furthermore, if the atomic instruction is completed, a defined value different from the above defined value is written, thereby displaying whether or not the threads are executing the atomic instruction. If an access request is issued from a certain thread, it is judged whether or not a thread different from the certain thread is executing the atomic instruction by referencing the flag values in the storage unit. If it is judged that another thread is executing the atomic instruction, the access request is kept standby. This makes it possible to realize the exclusive control processing necessary for processing the atomic instruction according to simple configuration.
申请公布号 US8261021(B2) 申请公布日期 2012.09.04
申请号 US20090654376 申请日期 2009.12.17
申请人 KIYOTA NAOHIRO;FUJITSU LIMITED 发明人 KIYOTA NAOHIRO
分类号 G06F12/00;G06F9/30 主分类号 G06F12/00
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