发明名称 Reducing simultaneous switching outputs using data bus inversion signaling
摘要 An apparatus includes a plurality of data lines defining a data bus for communicating data. A controller is operable to communicate a plurality of data transfers over the data bus using a plurality of data time slots, wherein for at least a subset of the data time slots the controller is operable to communicate an associated data bus inversion indicator indicating that bits communicated during the associated data time slot are inverted, the data bus inversion indicators for the subset of the data transfers are grouped into a data bus inversion vector, and the controller is operable to communicate a global data bus inversion indicator indicating an inversion of the data bus inversion vector.
申请公布号 US8260992(B2) 申请公布日期 2012.09.04
申请号 US20100758301 申请日期 2010.04.12
申请人 DEARTH GLENN A.;PATEL SHWETAL A.;ADVANCED MICRO DEVICES, INC. 发明人 DEARTH GLENN A.;PATEL SHWETAL A.
分类号 G06F13/36;G06F1/26;G06F1/32;G06F13/362;G06F13/372;H03M5/00 主分类号 G06F13/36
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