摘要 |
A digitally-controlled analog gain circuit supports at plurality of gain settings in which gain changes are made from a first setting to a new setting in response to a clocking signal of a non-uniform rate. The non-uniform rate clocking signal can be created pseudo randomly by applying a periodic sequence of clock pulses to a linear feedback shift register. Alternatively, the non-uniform rate clock signal can be created by applying a noise source to a phase detector input of a phase locked loop. The clocking signal can be generated by an oscillator, or as a sequence of pulses output by a zero crossing detector. Finally, the gain circuit can apply positive gain to the signal. Alternatively, the gain circuit can apply a negative gain (attenuation) to the signal. |