发明名称 Clear instruction information to indicate whether memory test failure information is valid
摘要 A test apparatus includes a fail memory (AFM) for storing therein fail information in association with each of the addresses of a memory under test and a mark memory (CMM) for storing therein, in association with each of the addresses of the memory under test, validity information indicating whether the fail information stored in the AFM is valid. When the validity information read from the CMM in association with an address under test indicates that the fail information that has been stored in the AFM is invalid, the test apparatus overwrites the fail information stored in the AFM with the fail information that is newly generated by a current test. On the other hand, when the validity information read from the CMM indicates that the fail information is valid, the test apparatus updates the fail information stored in the AFM with the new fail information and writes the updated fail information back into the AFM. When overwriting the fail information that has been stored in the AFM with the new fail information, the test apparatus writes into the CMM the validity information that indicates that the new fail information is valid. Initialization of the AFM is performed in such a manner that, before and after the initialization, different validity information indicates validity of the fail information.
申请公布号 US8261139(B2) 申请公布日期 2012.09.04
申请号 US20100709389 申请日期 2010.02.19
申请人 FUJISAKI KENICHI;ADVANTEST CORPORATION 发明人 FUJISAKI KENICHI
分类号 G11C29/00 主分类号 G11C29/00
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