发明名称 Cached dirty bits for context switch consistency checks
摘要 Embodiments of an invention using cached dirty bits for context switch consistency checks are disclosed. In one embodiment, a processor includes control logic and a cache. The control logic is to cause a consistency check to be performed on a subset of a plurality of state components during a first context switch. The cache is to store a dirty entry for each state component to indicate whether the corresponding state component is included in the subset.
申请公布号 US8261028(B2) 申请公布日期 2012.09.04
申请号 US20070968121 申请日期 2007.12.31
申请人 YOON KI W.;ALLEN RICARDO;INTEL CORPORATION 发明人 YOON KI W.;ALLEN RICARDO
分类号 G06F9/455 主分类号 G06F9/455
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