发明名称 Anti-islanding for grid-tie inverter using covariance estimation and logic decision maker
摘要 An anti-islanding implementation that introduces a small, continuously varying phase shift pattern in the output current of an inverter. In grid-connected mode, this phase shift pattern has no impact on the frequency of the inverter's output voltage. However, when islanded, the phase shift will cause the voltage frequency to deviate from nominal. Changes in the output current phase thus correlate well with the voltage frequency, so a covariance index is used to detect an islanding configuration. When this index exceeds a threshold, a larger phase shift pattern is introduced in the output current, large enough to cause the voltage frequency to fall outside the inverter's trip protection window without compromising the inverter's power quality yet ensuring reliable tripping of the inverter.
申请公布号 US8258759(B2) 申请公布日期 2012.09.04
申请号 US20100699652 申请日期 2010.02.03
申请人 YIN JUN;FAN CHI-SHENG;GARABANDIC DJORDJE;XANTREX TECHNOLOGY INC. 发明人 YIN JUN;FAN CHI-SHENG;GARABANDIC DJORDJE
分类号 H02P11/00;H02H7/06;H02P9/00 主分类号 H02P11/00
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