发明名称 FULLY DEPLETED SOI DEVICE WITH BURIED DOPED LAYER
摘要 <p>AbstractFully Depleted SOI Device with Buried Doped LayerThe present invention relates to a method for the manufacture of a semiconductor device, comprising: providing a first substrate, forming a doped layer in a surface region of the first substrate, forming a buried oxide layer on the doped layer and forming a semiconductor layer on the buried oxide layer to obtain an Se01 wafer, removing the buried oxide layer and the semiconductor layer from a first region of the Se01 wafer while maintaining the buried oxide layer and the semiconductor layer in a second region of the Se01 wafer, forming an upper transistor in the second region, forming a lower transistor, in particular, a recessed channel array transistor in the first region, wherein forming the p-channel and/or the n-channel transistor in the second region comprises forming a back gate in or by the doped layer and forming the transistor, in particular, a recessed channel array transistor in the first region comprises forming source and drain regions in or by the doped layer.Figure 1</p>
申请公布号 SG182896(A1) 申请公布日期 2012.08.30
申请号 SG20110086451 申请日期 2011.11.22
申请人 SOITEC 发明人 ENDERS, GERHARD;HOENLEIN, WOLFGANG;HOFMANN, FRANZ;MAZURE, CARLOS
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